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TLE6217G
Smart Quad Channel Low-Side Switch
Features
* * * * * *
Product Summary
4.8 - 32 60 0.2 0.35 2x5 2x3 V V A A
Supply voltage VS Shorted Circuit Protection Drain source voltage VDS(AZ)max Overtemperature Protection Overvoltage Protection On resistance RON 1,2 Parallel Control of the Inputs (PWM Applications) RON 3,4 Separate Diagnostic Pin for Each Channel Output current ID 1,2 Power - SO 20 - Package with integrated ID 3,4 cooling area * Standby mode with low current consumption * C compatible Input * Electrostatic Discharge (ESD) Protection * Green Product (RoHS Compliant)
* AEC Qualified
Application
* * * * All kinds of resistive and inductive loads (relays, electromagnetic valves) C compatible power switch for 12 and 24 V applications Solenoid control switch in automotive and industrial control systems Robotic Controls
PG-DSO-20-37
General description
Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate inputs and four open drain DMOS output stages. The TLE 6217 GP is fully protected by embedded protection functions and designed for automotive and industrial applications. Each channel has its own status signal for diagnostic feedback. Therefore the TLE 6217 GP is particularly suitable for ABS or Powertrain Systems.
Block Diagram
STBY
GND
VS
ENA
normal function
VBB
IN1 IN2 IN3 IN4 ST1
as Ch. 1
SCB / overload
LOGIC
overtemperature open load/sh. to gnd
as Ch. 1
Output Stage
as Ch. 1
OUT1
1
4 4
ST2 ST3 ST4
as ST 1 as ST 1 as ST 1
Gate Control
OUT4
GND
Data Sheet
1
Rev. 6.1, 2008-04
TLE6217G
Pin Configuration (Top view)
PG - DSO - 20 - 37
Pin Description
Pin Symbol Function 1 GND Ground 2 OUT1 Power Output channel 1 3 ST1 Status Output channel 1 4 IN4 Control Input channel 4 5 VS Supply Voltage 6 STBY Standby 7 IN3 Control Input channel 3 8 ST2 Status Output channel 2 9 OUT2 Power Output channel 2 10 GND Ground 11 GND Ground 12 OUT3 Power Output channel 3 13 ST3 Status Output channel 3 14 IN2 Control Input channel 2 15 GND Ground Logic 16 ENA Enable Input for all four channels 17 IN1 Control Input channel 1 18 ST4 Status Output channel 4 19 OUT4 Power Output channel 4 20 GND Ground Heat slug internally connected to ground pins
Data Sheet
2
Rev. 6.1, 2008-04
TLE6217G
Detailed Block Diagram
VS
STBY
internal supply
ENA
Overtemperature Channel 4
Overtemperature Channel 1 Open Load
Overload
IN1 ST1
LOGIC
OUT1
Open Load
IPD
IN4
LOGIC
Overload
OUT4
ST4
Overtemperature Channel 3
Overtemperature Channel 2
Open Load
IPD
IN2 ST2
LOGIC
Overload
OUT2
Open Load
IPD
IN3
LOGIC
Overload
OUT3
ST3
IPD
GND
Data Sheet
3
Rev. 6.1, 2008-04
TLE6217G
Maximum Ratings for Tj = - 40C to 150C
The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result.
Parameter Supply voltage Continuous drain source voltage (OUT1...OUT4) Input voltage IN1 to IN4, ENA Input voltage STBY Status output voltage Operating temperature range during clamping; t = 30 min during clamping; t = 15 min Storage temperature range Output current per channel Output current at reversal supply Status output current Inductive load switch off energy (single pulse) Tj = 25C Electrostatic Discharge Voltage (HBM) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. Standard S5.1 - 1993 Output 1-4 Pins All other Pins Thermal resistance junction - case (die soldered on the frame) Maximum operating lifetime (according to "Ambient thermal conditions")
Symbol VS VDS VIN , VENA VSTBY VST Tj Tj Tj Tstg ID(lim) ID 1,2 ID 3,4 IST EAS
Values -0.3 ... + 40 40 1.5... + 6 - 0.3 ... + 40 - 0.3 ... + 32 40 ... + 150 175 190 - 55 ... + 150 overload shutdown -4 -2 - 5 ... + 5 50
Unit V V V V C
A A mA mJ V V K/W
VESD VESD RthJC tb 2
4000 2000
10000
h
Ambient thermal conditions
TAmbient temperature range -40 C -20 C 25 C 60 C 80 C 100 C > 120 C operating periods 2% 10 % 24 % 34 % 24 % 5% 1%
Data Sheet
4
Rev. 6.1, 2008-04
TLE6217G
Electrical Characteristics
Parameter and Conditions VS = 4.8 to 18 V ; Tj = - 40 C to + 150 C (unless otherwise specified) 1. Power Supply (VS) Supply current (Outputs ON) Supply current (Outputs OFF) VENA = L, VSTBY = H Standby current Operating voltage 2. Power Outputs ON state resistance Channel 1,2 ID = 1A; VS 9.5 V ON state resistance Channel 3,4 ID = 1A; VS 9.5 V Z-Diode clamping voltage (OUT1...4) Pull down current Output Leakage Current Tj = 25 C Tj = 150C Tj = 25 C Tj = 150C ID 100 mA VSTBY = H, VIN = L VSTBY = L Tj = -40C...150C wafer test at 25C ID = 1 A ID = 1 A ID = 1 A ID = 1 A RDS(ON) RDS(ON) VDS(AZ) IPD IDlk 5 1 ton toff tfall trise tDSO tD tD-failure tD-IN tfOL(off) 0 0 3 3 20 500 500 500 10 5 10 10 10 1200 1200 1200 30 20 30 30 30 100 3000 3000 3000 100 45 10 20 0.2 0.5 0.35 0.75 60 50 V A A A s VSTBY = L IS IS IS VS 4.8 8 4 10 32 mA mA A V Symbol Values min Unit typ max
Output turn on delay time Output turn off delay time 1 Output on fall time 1 Output off rise time 1 Overload switch-off delay time 1 2 Output off status delay time Failure extension Time for Status Report Input Suppression Time Open Load (off) filtering Time 2
1
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA) Input low voltage Input high voltage Input voltage hysteresis Input pull down current Enable pull down current
2
VINL VINH VINHys VIN = 5 V; VS 6.5 V VENA = 5 V; VS 6.5 V IIN IENA VSTL ISTH
- 0.3 2.0 50 10 10 100 30 20
1.0 6.0 60 40
V V mV A A
4. Digital Status Outputs (ST1 - ST4) Open Drain Output voltage low Leakage current high IST = 2 mA 0.5 2 V A
1
2
See timing diagram, resistive load condition; VS 9 V This parameter will not be tested but assured by design
Data Sheet
5
Rev. 6.1, 2008-04
TLE6217G
Electrical Characteristics
Parameter and Conditions VS = 4.8 to 18 V ; Tj = - 40 C to + 150 C (unless otherwise specified) 5. Standby Input (STBY) Input low voltage Input high voltage Input current 6. Diagnostic Functions Open load detection voltage VENA = X, VIN = L Open load detection current channel 1,2 VENA = VIN = H Open load detection current channel 3,4 VENA = VIN = H Overload Current channel 1, 2 Overload Current channel 3 , 4 Overtemperature shutdown threshold Hysteresis
2
Symbol
Values min
Unit typ max
VSTBY VSTBY VSTBY = 18 V ISTBY VDS(OL) ID(OL) 1,2 ID(OL) 3,4 ID(lim) 1,2 ID(lim) 3,4 Tth Thys tIN
0 3.5
1 VS 300
V V A
VS 6.5 V VS 6.5 V VS 6.5 V VS 6.5 V VS 6.5 V
0.3*VS 0.33*VS 0.36*VS 100 100 5 3 170 10 500 7.5 5 200 240 240
V mA mA A A C K s
Pulse Width for static diagnostic output
2
This parameter will not be tested but assured by design
Data Sheet
6
Rev. 6.1, 2008-04
TLE6217G
Application Description
This IC is especially designed to drive inductive loads (relays, electromagnetic valves). Integrated clamp-diodes limit the output voltage when inductive loads are discharged. Four open-drain logic outputs indicate the status of the integrated circuit. The following conditions are monitored and signalled: - Overloading of output (also shorted load to supply) in active mode - Open and shorted load to ground in active and inactive mode - Overtemperature
Circuit Description
Input Circuits The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs are provided with pull-down current sources. Not connected inputs are interpreted as low and the respective output stages are switched off. In standby mode (STBY = LOW) the current consumption is greatly reduced. The circuit is active when STBY = HIGH. If the standby function is not used, it is allowed to connect the standby pin directly to VS. Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high transition. Output Stages The four power outputs consist of DMOS-power transistors with open drains. The output stages are short circuit protected throughout the operating range. Each output has it's own zenerclamp. This causes a voltage limitation at the power transistor when inductive loads are switched off. Parallel to the DMOS transistors there are internal pull down current sources. They are provided to detect an open load condition in the off state. They will be disconnected in the standby mode. Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ VDS = 40V. Protective Circuits The outputs are protected against current overload and overtemperature. If the output current increases above the overload detection threshold IQO for a longer time then tDSO or the temperature increases above Tth, then the power transistor is immediately switched off. It remains off until the control signal at the input is switched off and on again.
Fault Detection The status outputs indicate the switching state of the output stage. Under normal conditions is: ST = low Output off; ST = high Output on. If an error occurs, the logic level of the status output is inverted, as listed in the diagnostic table. If current overload or overtemperature occurs for a longer time than tDSO, the fault condition is latched into an internal register and the output is shutdown. The reset is done by switching off the corresponding control input for a time longer than tD-IN.
Data Sheet 7 Rev. 6.1, 2008-04
TLE6217G
Open load is detected for all four channels in on and off mode. In the on mode the load current is monitored. If it drops below the specified threshold value IQU then an open load condition is detected. In the off mode, the output voltage is monitored. An open load condition is detected when the output voltage of a given channel is below the threshold VDS(OL), which is typ. 33 % of the supply voltage VS. To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection in off mode uses a filter of typ. 30s. Status output at pulse width operation If the input is operated with a pulsed signal, the status does not follow each single pulse of the input signal. An internal delay tD of typ. 1.2ms (min 500 s) enables a continuous status output signal. See the timing diagrams on the following pages for further information. This internal status delay simplifies diagnostic software for pwm applications.
Diagnostic Table
In general the status follows the input signal in normal operating conditions. If any error is detected the status is inverted.
Operating Condition Standby Normal function
Standby Input STBY L H H H H H H H H H H
Enable Input ENA X L H H L L H H H H L H H L
Control Input IN X X L H L H L H H HL X H HL X
Power Output Q off off off ON off off off ON off off off off off off
Status Output ST H L L H H H H L L L L L L L
Open load or short to ground
Overload or short to supply1) reset latch 2)
1)
Overtemperature reset latch
2)
H H H
Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time tDSO specified in 2.10 will not be latched and not reported at the status pin.
Data Sheet
8
Rev. 6.1, 2008-04
TLE6217G
Note 2): to reset latched status-output in case of overload/short-to-supply/overtemperature the control input has to go low and stay low for longer than max. Input suppression time tD-IN specified in 2.13 of the characteristics
Failure Situations and Status Report
Logic Block Diagram
Overtemperature 1.....overtemperature 0.....normal cond.
Gate Driver 1... Output 0....Output O Off
ENA 1....enabled 0... disabled Input 1....On 0... Off IN Delay D
SET
tD
tDSO Delay 60s S Q Q
OUT
1,2ms typ.
R
Overload 0.....overload 1.....normal cond.
CLR
IN
tD
60s typ.
tD tD-IN when overload d EN
Delay D
Delay 60s OUT
OUT Status 0....High 1....Low
tfOL(off)
HI
Open load "off" 1.....open load 0.....normal cond.
IN EN
Delay D OUT
Filter 30s Filter tD-failure
IN
Open load "on" 0.....open load 1.... normal cond.
EN
Delay D
OUT
IN tD-failure
Data Sheet
9
Rev. 6.1, 2008-04
TLE6217G
Timing Diagrams
Output Slope
VIN VI NH V INL t VDS
VS 85%
t on
15%
t off
t tf tr
VST
tD
t
Fig. 1
Overload Switch OFF Delay
ID ID(lim) ID(OL)
t t DSO
VST
t D-failure
t
Fig. 2
Data Sheet
10
Rev. 6.1, 2008-04
Data Sheet
Test Circuit
VD = 5V
VS
10k R L2
IVS
10k
10k
10k
R L4
R L3
R L1
ST1
IST1 ID1
VS ST1 OUT1
OUT1
ST2
IST2
ST2
IST3 ID2
ST3 ST3 OUT2
IST4
OUT2
ST4 ST4
ID3 IIN1
IN1 IN1 OUT3
IIN2
OUT3
TLE 6217 GP
11
IN2 IN2 IN3
IIN3 ID4
TLE 6227
OUT4
IN3 IN4
IIN4
OUT4
IN4 ENA STBY
VDS(OUT4) VDS(OUT3) VDS(OUT2) VDS(OUT1)
ENA
VIN3 VIN4 VENA ISTBY VSTBY
IENA
VST1 VST2 VST3 VST4 VIN1
VIN2
GND
TLE6217G
Rev. 6.1, 2008-04
TLE6217G
Application Circuit
+12V
L4 L3 L2 L1
STBY ST1 OUT1 ST2 ST3 ST4 TLE OUT2
6217 OUT3
10k 10k 10k 10k
VD = 5V
C
Status Output
Control Inputs
The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of battery interruption during OFF-commutation.
Data Sheet 12 Rev. 6.1, 2008-04
Enable Input
ENA GND
VS
IN1 IN2 IN3 IN4
OUT4
TLE6217G
Timing Diagrams of Diagnostic with Pulsed Input Signal
Normal condition, resistive load, pulsed input signal
V
IN t IN
ID
V ST tD tD
Fig. 3
Current Overload
F tINoff V IN I D(lim) ID current overload condition
V ST t DSO
tD-IN
t DSO
tINoff < tD-IN : Input suppression time avoids a restart after overtemperature Fig. 4
Data Sheet
13
Rev. 6.1, 2008-04
TLE6217G
Diagnostic status output at different open load current conditions
V IN
ID t D-failure V ST
I D(OL)
tD
Fig. 5
V
IN tINoff
ID tD-failure V ST tD
I D(OL)
tINOFF < tD leads to a static status signal
Fig. 6
V
IN tINoff I D(OL)
ID tD-failure tD-failure tD tD-failure
V ST
tINoff > tD : Intermittend status signal
Fig. 7
Data Sheet
14
Rev. 6.1, 2008-04
TLE6217G
Normal operation, followed by open load condition
~ 55V
Open load voltage condition
VDS 12V 33%
VIN I D(OL)
ID
tD-failure
tfOL(off)-
VST
tD
tD-failure
Fig. 8
Overtemperature
Overtemperature
VIN
tINoff > tD-IN
I D(OL) ID
tD-failure tD-failure
Reset of overload Flip Flop
VST
t
DSO
Fig. 9
Data Sheet
15
Rev. 6.1, 2008-04
TLE6217G
Ordering code Type
TLE6217 G TLE6217 C
Ordering Code
on request on request
Package
P - DSO - 20 - 12 Bare dice on wafer
Pad Assignment
Out
GTV
ST
IN
VR1 EN
I
GN
IN
T P
Out ST
GTV
P G N
y
P G N
x
P G N
center of
P G N
GTV
ST Out
IN
I
V
STB
IN
V
ST Out
GTV
Data Sheet
16
Rev. 6.1, 2008-04
TLE6217G
Package Outlines
3.5 MAX.
11 0.15 1)
3.25 0.1
B
0.25
+0.07 -0.02
0 +0.1
1.1 0.1
2.8
1.27
15.74 0.1 (Heatslug) 0.25 M A 20x
1.3
6.3 (Mold)
14.2 0.3
0.1
Heatslug 0.95 0.15 0.25 B
0.4 +0.13
3.2 0.1 (Metal)
20
11
20
Index Marking
1 x 45
1
10
10
15.9 0.15 1) (Mold)
1)
A
13.7 -0.2 (Metal)
1
Heatslug
Does not include plastic or metal protrusion of 0.15 max. per side
PG-DSO-20-37 (Please Insert Package Long Name!)
Figure 1
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 17
Dimensions in mm Rev. 6.1, 2008-04
5.9 0.1 (Metal)
Bottom View 11
5 3
TLE6217G
Revision History
1
Revision 6.1
Revision History
Date 2008-04-04 Changes Initial version of RoHS-compliant derivate of TLE6217G Page 1: AEC certified statement added Page 1 and 17: added RoHS compliance statement and Green product feature Page 1 and 17: Package changed to RoHS compliant version Page 18-19: added Revision History, updated Legal Disclaimer
Data Sheet
18
Rev. 6.1, 2008-04
Edition 2008-04 Published by Infineon Technologies AG 81726 Munich, Germany (c) 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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